Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Dynamic Defragmentation of Reconfigurable Devices (2012) Fekete SP, Kamphans T, Schweer N, Tessars C, Van Der Veen JC, Angermeier J, Koch D, Teich J Journal article A very fast and quasi-accurate power-state-based system-level power modeling methodology (2012) Xu Y, Rosales R, Wang B, Streubühr M, Hasholzner R, Haubelt C, Teich J Conference contribution Mastering Software Variant Explosion for GPU Accelerators (2012) Membarth R, Hannig F, Teich J, Körner M, Eckert W Book chapter / Article in edited volumes Unreliable Data Transmissions and Limited Hardware Communication Buffers in Automotive E/E Virtual Prototypes (2012) Graf S, Glaß M, Teich J Conference contribution System Level Synthesis Flow for Self-adaptive Multi-mode Reconfigurable Systems (2012) Wildermann S, Reimann F, Ziener D, Teich J Conference contribution System-Level Modeling and Simulation of Networked PROFINET IO Controllers (2012) Zhang L, Streubühr M, Glaß M, Teich J, von Schwerin A, Liu K Conference contribution Symbolic loop parallelization of static control programs (2012) Tanase AP, Hannig F, Teich J Conference contribution Simulation of Resource-Aware Applications on Heterogeneous Architectures (2012) Roloff S, Hannig F, Teich J Conference contribution Power Management Strategies for Serial RapidIO Endpoints in FPGAs (2012) Schmid M, Hannig F, Teich J Conference contribution On-the-fly Composition of FPGA-Based SQL Query Accelerators Using A Partially Reconfigurable Module Library (2012) Dennl C, Ziener D, Teich J Conference contribution