Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Loop Coarsening in C-based High-Level Synthesis (2015) Schmid M, Reiche O, Hannig F, Teich J Conference contribution, Conference Contribution Multimodal Medical Image Registration Using Particle Swarm Optimization with Influence of the Data's Initial Orientation (2015) Schmitt M, Wanka R, Schwab L Conference contribution Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) (2015) Hannig F, Fey D, Lokhmotov A Edited Volume A Methodology for the Optimized Design of an E/E Architecture Component Platform (2015) Graf S, Glaß M, Teich J, Platte D Conference contribution Degree-constrained Subgraph Reconfiguration is in P (2015) Mühlenthaler M Conference contribution A Fine-Grained Configurable Cache Architecture for Soft Processors (2015) Biglari M, Barijough KM, Goudarzi M, Pourmohseni B Conference contribution, Original article Code Generation for Tightly Coupled Processor Arrays (2015) Boppu S Thesis Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays (2015) Tanase AP, Witterauf M, Hannig F, Teich J Conference contribution, Conference Contribution Resource-awareness on heterogeneous MPSoCs for image processing (2015) Paul J, Stechele W, Oechslein B, Erhardt C, Schedel J, Lohmann D, Schröder-Preikschat W, et al. Journal article, Original article Network interface with task spawning support for NoC-based DSM architectures (2015) Zaib A, Heißwolf J, Weichslgartner A, Wild T, Teich J, Becker J, Herkersdorf A Conference contribution