Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Symbolic inner loop parallelisation for massively parallel processor arrays (2014) Tanase AP, Witterauf M, Teich J, Hannig F Conference contribution, Conference Contribution Multi-objective local-search optimization using reliability importance measuring (2014) Khosravi F, Reimann F, Glaß M, Teich J Conference contribution, Conference Contribution DPSK modulated wakeup mechanism for point-to-point networks with partial network support (2014) Seyler J, Rahimov S, Streichert T, Glaß M, Teich J Conference contribution, Conference Contribution DAARM: Design-time application analysis and run-time mapping for predictable execution in many-core systems (2014) Weichslgartner A, Gangadharan D, Wildermann S, Glaß M, Teich J Conference contribution, Conference Contribution An Image Processing Library for C-based High-Level Synthesis (2014) Schmid M, Apelt N, Hannig F, Teich J Conference contribution MAESTRO - Holistic Actor-oriented Modeling of Non-Functional Properties and Firmware Behavior for MPSoCs (2014) Rosales R, Glaß M, Teich J, Wang B, Xu Y, Hasholzner R Journal article Symbolic Mapping of Loop Programs onto Processor Arrays (2014) Teich J, Tanase AP, Hannig F Book chapter / Article in edited volumes Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures (2014) Reimann F, Glaß M, Teich J, Cook A, Gomez LR, Ull D, Wunderlich HJ, et al. Conference contribution Quality-aware video decoding on thermally-constrained MPSoC platforms (2014) Gangadharan D, Teich J, Chakraborty S Conference contribution, Conference Contribution Design and Evaluation of Future Ethernet AVB-based ECU Networks (2014) Glaß M, Graf S, Reimann F, Teich J Book chapter / Article in edited volumes