Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Network interface with task spawning support for NoC-based DSM architectures (2015) Zaib A, Heißwolf J, Weichslgartner A, Wild T, Teich J, Becker J, Herkersdorf A Conference contribution Fault-tolerant communication in invasive networks on chip (2015) Heißwolf J, Weichslgartner A, Zaib A, Friederich S, Masing L, Stein C, Duden M, et al. Conference contribution, Conference Contribution Design Methodology and Run-Time Management for Predictable Many-Core Systems (2015) Wildermann S, Weichslgartner A, Teich J Conference contribution, Conference Contribution Application-driven reconfiguration of shared resources for timing predictability of MPSoC platforms (2015) Gangadharan D, Sousa É, Lari V, Hannig F, Teich J Conference contribution, Conference Contribution Reliability of Space-Grade vs. COTS SRAM-Based FPGA in N-Modular Redundancy (2015) Glein R, Rittner F, Becher A, Ziener D, Frickel J, Teich J, Heuberger A Conference contribution, Conference Contribution Invasive computing for predictable stream processing: A simulation-based case study (2015) Roloff S, Wildermann S, Hannig F, Teich J Conference contribution, Conference Contribution Towards a Performance-portable Description of Geometric Multigrid Algorithms using a Domain-specific Language (2014) Membarth R, Reiche O, Schmitt C, Hannig F, Teich J, Stürmer M, Köstler H Journal article Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs (2014) Schmid M, Reiche O, Schmitt C, Hannig F, Teich J Conference contribution Experiments on Optimizing the Performance of Stencil Codes with SPL Conqueror (2014) Grebhahn A, Kuckuk S, Schmitt C, Köstler H, Siegmund N, Apel S, Hannig F, Teich J Journal article ExaStencils: Advanced Stencil-Code Engineering (2014) Lengauer C, Apel S, Größlinger A, Grebhahn A, Kronawitter S, Bolten M, Rittich H, et al. Conference contribution