Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Redundancy-aware Design Space Exploration for Memory Reliability in Many-cores (2017) Aliee H, Banaiyianmofrad A, Glaß M, Teich J, Dutt N Conference contribution Application Mapping Methodologies for Invasive NoC-Based Architectures (2017) Weichslgartner A Thesis High Performance Network-on-Chip Simulation by Interval-based Timing Predictions (2017) Roloff S, Hannig F, Teich J Conference contribution, Conference Contribution Optimizing Scrubbing by Netlist Analysis for FPGA Configuration Bit Classification and Floorplanning (2017) Schmidt B, Ziener D, Teich J, Zöllner C Journal article Symbolic Parallelization of Nested Loop Programs (2017) Tanase AP Thesis Convoy Tracking for ADAS on Embedded GPUs (2017) Fickenscher J, Reinhart S, Bouzouraa ME, Hannig F, Teich J Conference contribution TCPA Editor: A Design Automation Environment for a Class of Coarse-Grained Reconfigurable Arrays (2017) Sousa É, Chakraborty A, Tanase AP, Hannig F, Teich J Conference contribution, Abstract of a poster A Reconfigurable Memory Architecture for System Integration of Coarse-Grained Reconfigurable Arrays (2017) Sousa É, Tanase AP, Hannig F, Teich J Conference contribution Introduction to Hardware/Software Codesign (2017) Ha S, Teich J, Haubelt C, Glaß M, Mitra T, Dömer R, Eles P, et al. Book chapter / Article in edited volumes Holistic Actor-Oriented Modeling of Embedded Systems for ESL Power Consumption Evaluation (2017) Rosales R Thesis