Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

IP-Cores Watermarking Scheme at Behavioral Level Using Genetic Algorithms (2019) Echavarria Gutiérrez JA, Morales-Reyes A, Cumplido R, Salido MÁ, Feregrino C Journal article, Original article ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing (2019) Becher A, Herrmann A, Wildermann S, Teich J Conference contribution, Conference Contribution Automatic Optimization of the VLAN Partitioning in Automotive Communication Networks (2018) Smirnov F, Reimann F, Teich J, Glaß M Journal article, Original article Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution (2018) Schmitt C, Schmid M, Kuckuk S, Köstler H, Teich J, Hannig F Journal article, Original article Model-Based Design Automation of Hardware/Software Co-Designs for Xilinx Zynq PSoCs (2018) Streit FJ, Letras M, Wildermann S, Hackenberg B, Falk J, Becher A, Teich J Conference contribution, Conference Contribution Can Approximate Computing Reduce Power Consumption on FPGAs? (2018) Echavarria Gutiérrez JA, Schütz K, Becher A, Wildermann S, Teich J Conference contribution, Original article Integrated Modeling Using Finite State Machines and Dataflow Graphs (2018) Falk J, Neubauer K, Haubelt C, Zebelein C, Teich J Book chapter / Article in edited volumes Path Planning for Highly Automated Driving on Embedded GPUs (2018) Fickenscher J, Schmidt S, Hannig F, Bouzouraa ME, Teich J Edited Volume Run-time Requirement Enforcement for Loop Programs on Processor Arrays (2018) Witterauf M, Teich J Conference contribution, Conference Contribution A Journey into DSL Design using Generative Programming: FPGA Mapping of Image Border Handling through Refinement (2018) Özkan MA, Pérard-Gayot A, Membarth R, Slusallek P, Teich J, Hannig F Conference contribution, Conference Contribution