Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

TRAC: Compilation-based Design of Transformer Accelerators for FPGAs (2022) Plagwitz P, Hannig F, Teich J Conference contribution, Conference Contribution DSP-Packing: Squeezing Low-precision Arithmetic into FPGA DSP Blocks (2022) Sommer J, Özkan MA, Keszöcze O, Teich J Conference contribution, Original article Real-Time Waveform Matching with a Digitizer at 10 GS/s (2022) Trautmann J, Patsiatzis N, Becher A, Teich J, Wildermann S Conference contribution, Conference Contribution Precision- and Accuracy-Reconfigurable Processor Architectures—An Overview (2022) Brand M, Keszöcze O, Teich J Journal article Probability-based DSE of Approximated LUT-based FPGA Designs (2022) Echavarria Gutiérrez JA, Keszöcze O, Teich J Conference contribution, Original article Grant Prediction-based Dynamic Power Management for 5G to Reduce Mobile Device Energy Consumption (2022) Brand P, Hackenberg B, Falk J, Teich J Conference contribution Characterization of Side Channels on FPGA-based Off-The-Shelf Boards against Automated Attacks (2022) Trautmann J, Teich J, Wildermann S Conference contribution, Original article Design and Error Analysis of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains (2022) Echavarria Gutiérrez JA, Wildermann S, Keszöcze O, Khosravi F, Becher A, Teich J Journal article, Original article Enforcement FSMs - Specification and Verification of Non-Functional Properties of Program Executions on MPSoCs (2021) Esper K, Wildermann S, Teich J Conference contribution, Conference Contribution Design and Evaluation of a Tunable PUF Architecture for FPGAs (2021) Streit FJ, Krüger P, Becher A, Wildermann S, Teich J Conference contribution, Abstract of lecture