Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Fast and Feasible Periodic Sorting Networks of Constant Depth (1994) Kutylowski M, Lorys K, Oesterdiekhoff B, Wanka R Conference contribution A Compiler for Application-Specific Processor Arrays (Zugl. Doktorarbeit) (1993) Teich J Thesis Minimal communication in massively parallel architectures (1993) Teich J, Thiele L, Zhang L Conference contribution Partitioning of processor arrays: A piecewise regular approach (1993) Teich J, Thiele L Journal article A transformative approach to the partitioning of processor arrays (1992) Teich J, Thiele L Conference contribution Control generation in the design of processor array (1992) Teich J, Thiele L Book chapter / Article in edited volumes The concepts of COMPAR: A compiler for massive parallel architectures (1992) Arzt U, Teich J, Thiele L Conference contribution Hierarchical concepts in the design of processor arrays (1992) Arzt U, Teich J, Schumacher M, Thiele L Conference contribution Control generation in the design of processor arrays (1991) Teich J, Thiele L Journal article Uniform design of parallel programs for DSP (1991) Teich J, Thiele L Conference contribution, Conference Contribution