Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems (2003) Bobda C Conference contribution Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware (2003) Bednara M, Danne K, Deppe M, Oberschelp O, Slomka F, Teich J Journal article Automatic Synthesis of FPGA Processor Arrays from Loop Algorithms (2003) Teich J, Bednara M Journal article Accelerating Design Space Exploration (2003) Haubelt C, Teich J Conference contribution Solving hierarchical optimization problems using MOEAs (2003) Teich J, Haubelt C, Mostaghim S, Tyagi A Book chapter / Article in edited volumes SAT-based techniques in system synthesis (2003) Haubelt C, Teich J, Feldmann R, Monien B Conference contribution, Conference Contribution Fault tolerance analysis of distributed reconfigurable systems using SAT-based techniques (2003) Feldmann R, Haubelt C, Monien B, Teich J Conference contribution ReCoNet: Modeling and implementation of fault tolerant distributed reconfigurable hardware (2003) Haubelt C, Koch D, Teich J Conference contribution, Conference Contribution Modellierung Rekonfigurierbarer Systemarchitekturen (2002) Haubelt C, Teich J, Richter K, Ernst R Conference contribution Generation of Distributed Loop Control (2002) Hannig F, Teich J, Bednara M Book chapter / Article in edited volumes