Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

A Model for Buffer Exploration in EDF Scheduled Embedded Systems (2003) Teich J, Slomka F Conference contribution FPGA designs of parallel high performance GF(2^233) multipliers (2003) Grabbe C, Bednara M, Teich J, von zur Gathen J, J. Shokrollahi J Conference contribution, Conference Contribution Synthesizing Passive Networks by applying Genetic Programming and Evolution Strategies (2003) Kralicek P, John W, Reinhold C, Teich J Conference contribution Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System (2003) Bobda C Conference contribution Improved time domain simulation of optical multimode intrasystem interconnects (2003) Gerling J, Mrozynski G, Schrage J, Stübbe O, Teich J Conference contribution Entwurfsautomatisierung elektronischer Systeme auf Systemebene (2003) Teich J Conference contribution Efficient Implementation of the Singular Value Decomposition on a Reconfigurable System (2003) Bobda C, Linarth AG Conference contribution Covering Pareto Sets by Multilevel Evolutionary Subdivision Techniques (2003) Dellnitz M, Mostaghim S, Schütze O, Teich J Conference contribution A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems (2003) Bobda C Conference contribution Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware (2003) Bednara M, Danne K, Deppe M, Oberschelp O, Slomka F, Teich J Journal article